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UCC3974PWRG4资料 | |
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UCC3974PWRG4 PDF Download |
File Size : 116 KB
Manufacturer:TI Description:PLL1 generates a frequency that is equal to the reference divided by an 8-bit divider (Q) and multiplied by an 11-bit divider in the PLL feedback loop (P). The output of PLL1 is sent to two locations: the cross point switch and the PECL output (CY22394). The output of PLL1 is also sent to a /2, /3, or /4 synchronous post-divider that is output through CLKE. The frequency of PLL1 can be changed via serial programming or by external CMOS inputs, S0, S1, and S2. See the following section on general-purpose Inputs for more detail. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:UCC3974PWRG4 厂 家:TI 封 装:SSOP-16 批 号:08+ 数 量:80 说 明:QQ:104735486 611606076 |
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运 费:运费到付10.00元(快递)20.00元(顺风) 所在地:深圳 新旧程度: |
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