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SP234AET-L

SP234AET-L资料
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File Size : 116 KB Manufacturer:Sipex Description:I/O2 bit toggling. Please see status bit table for more details. RDY/BUSY: An open drain READY/BUSY output pin pro- vides another method of detecting the end of a program or erase operation. RDY/BUSY is actively pulled low during the internal program and erase cycles and is released at the completion of the cycle. The open drain connection allows for OR-tying of several devices to the same RDY/BUSY line. HARDWARE DATA PROTECTION: Hardware features protect against inadvertent programs to the AT49BV16X4(T) in the following ways: (a) V CC sense: if VCC is below 1.8V (typical), the program function is inhib- ited. (b) VCC power on delay: once VCC has reached the VCC sense level, the device will automatically time out 10 ms (typical) before programming. (c) Program inhibit: hold- ing any one of OE low, CE high or WE high inhibits pro- gram cycles. (d) Noise filter: pulses of less than 15 ns (typical) on the WE or CE inputs will not initiate a program cycle. INPUT LEVELS: While operating with a 2.7V to 3.6V power supply, the address inputs and control inputs (OE, CE, and WE) may be driven from 0 to 5.5V without adversely affecting the operation of the device. The I/O lines can only be driven from 0 to VCC + 0.6V. OUTPUT LEVELS: Output High Levels (VOH) are equal to VCCQ - 0.2V (not VCC). For 2.7V - 3.6V output levels, VCCQ must be tied to V CC. For 1.8V - 2.2V output levels, V CCQ must be regulated to 2.0V 10% while VCC must be regu- lated to 2.7V - 3.0V (for minimum power).


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	1PCS	100PCS	1K	10K
价格


型号：SP234AET-L 厂家：Sipex 封装：SOP16 批号：535 数量：5048 说明：QQ：104735486 611606076


运费：运费到付10.00元（快递）20.00元（顺风）所在地：深圳新旧程度：