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SN74CBT3125PWRG4资料 | |
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SN74CBT3125PWRG4 PDF Download |
File Size : 116 KB
Manufacturer:TI Description:Figure 6 shows an SDA signal interfaced via P82B96 and the PCA82C250 to a balanced twisted pair bus capable of supporting over 100 nodes. In this way over 100 separate I2C nodes can be interconnected, retaining the conventional I2C protocol. Operation over short distances (e.g., 50 meters) at 100 kHz is possible. To meet the I2C timing requirements for the acknowledge bit it is necessary to select a lower clock speed when working with very long busses. As a minimum, the round trip signal propagation delay, from any one node to another node and back again, must be less than the clock low period. Signals will typically travel 1 meter in 5ns. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:SN74CBT3125PWRG4 厂 家:TI 封 装:MSSOP14 批 号:07+G4 数 量:295 说 明:QQ:104735486 611606076 |
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运 费:运费到付10.00元(快递)20.00元(顺风) 所在地:深圳 新旧程度: |
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