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SN74AUC34RGYRG4

SN74AUC34RGYRG4资料
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File Size : 116 KB Manufacturer:TI Description:Clock Input. CLK provides the reference signal to the internal PLL. Feedback Input. FBIN provides the feedback signal to the internal PLL. Output Bank Enable. When G is high, all outputs 1Y(0:9) are enabled. When G is low, Outputs 1Y(0:9) are disable to a logic-low state. Feedback Output. FBOUT completes the feedback loop of the PLL by being wired to FBIN. Clock Outputs. These outputs provide low-skew copies of CLKIN. Each output has an embedded series-damping resistor. Analog Power Supply. AVcc provides the power reference for the analog circuitry. AVcc can be also used to bypass the PLL for the test purpose. When AVcc is strapped to ground, PLL is bypassed and CLK is buffered directly to the device outputs. Analog Ground. AGND provides the ground reference for the analog circuitry.

	1PCS	100PCS	1K	10K
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型号：SN74AUC34RGYRG4 厂家：TI 封装：QFN 批号：07+G4 数量：237 说明：QQ：104735486 611606076


运费：运费到付10.00元（快递）20.00元（顺风）所在地：深圳新旧程度：