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OPA244NA

OPA244NA资料
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File Size : 116 KB Manufacturer:TI/BB Description:The PWRDWN# pin is used to shut off all clocks cleanly and instruct the device to evoke power savings mode. Additionally, PWRDWN# should be asserted prior to shutting off the input clock or power to ensure all clocks shut down in a glitch-free manner. PWRDWN# is an asynchronous active low input. This signal is synchronized internal to the device prior to powering down the clock buffer. PWRDWN# is an asynchronous input for powering up the system. When PWRDWN# is asserted low, all clocks will be held high or three-stated (depending on the state of the control register drive mode and OE bits) prior to turning off the VCO. All clocks will start and stop without any abnormal behavior and must meet all AC and DC parameters. This means no glitches, frequency shifting or amplitude abnor- malities among others.

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型号：OPA244NA 厂家：TI/BB 封装：SOT23/5 批号：08+ 数量：57345 说明：QQ：104735486 611606076


运费：运费到付10.00元（快递）20.00元（顺风）所在地：深圳新旧程度：