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M27C256B-15F1

M27C256B-15F1资料
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File Size : 116 KB Manufacturer:ST Description:See SOA curves or consult factory for appropriate derating. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/C or better temperature stability. The peak-to-peak output ripple voltage is measured with an external 10-µF ceramic capacitor. See the standard application schematic. A small, low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc. This control pin has an internal pull-up to the input voltage VI (7.5 V for pin 8). If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. For further information, see the application information section. A 560-µF input capacitor are required for proper operation. The electrolytic capacitor must be rated for a minimum of 1050 mA rms of ripple current. An external output capacitor is not required for basic operation. Adding 330 µF of distributed capacitance at the load improves the transient response. This is the calculated maximum. The minimum ESR limitation oftens result in a lower value. When controlling the Track pin using a voltage supervisor, CO(max) is reduced to 2200 µF. See the application notes for further guidance. This is the typical ESR for all the electrolytic (nonceramic) output capacitance. Use 7 mΩ as the minimum when using max-ESR values to calculate.


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	1PCS	100PCS	1K	10K
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型号：M27C256B-15F1 厂家：ST 封装：CDIP28 批号：99+ 数量：65 说明：QQ：104735486 611606076


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