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LM393ADGKR

LM393ADGKR资料
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File Size : 116 KB Manufacturer:TI Description: The Clock Regenerator block has two possible modes of operation. With the MODE pin high, internal crystal control- led clock regeneration is selected, whereas with the MODE pin low external clock regeneration is selected using, for example, a tuned circuit. In external clock regeneration mode, a logically ORed version of the HDB3 data, from the RXD inputs, is output to the external clock regeneration circuitry on the CRYSTAL OUT/CDR pin. The regenerated clock is then fed back into the LM393ADGKR on the DECODER CLOCK pin External clock regeneration may be used for operation with data rates of 1.544Mbits, 2.048Mbits or 8.448Mbits. In internal clock regeneration mode, the logically ORed data is input to a digital regenerator which constantly resynchronises a divide-by-8 counter to the incoming data stream. The clock thus regenerated is output to the de- coder circuitry and to any external circuitry on the DECODER CLOCK pin. A crystal of frequency 8 times the required data rate must be connected between the CRYSTAL IN and CRYSTAL OUT/CDR pins. Thus, the crystal frequency needs to be 16.384MHz or 12.352MHz for data rates of 2.048Mbits or 1.544Mbits respectively. Internal clock regeneration may not be used for operation at a data rate of 8.448Mbits. The LM393ADGKR is capable of withstanding up to 0.25UI of peak to peak input jitter at a jitter frequency of 2.048MHz without introducing errors into the decoded data. At lower jitter frequencies the LM393ADGKR is capable of withstanding much larger values to peak to peak input jitter. In the


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	1PCS	100PCS	1K	10K
价格


型号：LM393ADGKR 厂家：TI 封装：MSOP8 批号：07+G4 数量：285 说明：QQ：104735486 611606076


运费：运费到付10.00元（快递）20.00元（顺风）所在地：深圳新旧程度：