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| DAC7714U/1K资料 | |
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DAC7714U/1K PDF Download |
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File Size : 116 KB
Manufacturer:TI/BB Description:Note 1: Specifications from 0C to -40C are guaranteed by design, not production tested. Note 2: Supply current is specified for static state only. Note 3: The SMBus logic block is a static design that works with clock frequencies down to DC. While slow operation is possible, it violates the 10kHz minimum clock frequency of the SMBus specifications, and may monopolize the bus. Note 4: Refer to Figures 2a and 2b for SMBus timing parameter definitions (write and read diagrams). Note 5: A transition must internally provide a hold time of 300ns to accommodate for the undefined region of the falling edge. Note 6: Refer to Figure 3 for the acknowledge timing diagram and tDV parameter definition. Note 7: Refer to Figure 5 for START-STOP interrupt timing diagrams and parameter definitions. Note 8: Refer to Figure 4 for I/O setup and hold timing parameter definitions. |
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| 相关型号 | |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：DAC7714U/1K 厂 家：TI/BB 封 装：SOIC16 批 号：08+ 数 量：130 说 明：QQ：104735486 611606076 |
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运 费：运费到付10.00元（快递）20.00元（顺风） 所在地：深圳 新旧程度： |
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